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1.1. Àо±â Àü¿¡

  • ÀÌ ¹®¼­¿¡¼­ »ç¿ëµÈ Ç¥±â´Â ½ÇÁ¦ À̸§°ú ´Ù¸¦¼ö ÀÖ½À´Ï´Ù. ´ÜÁö ¼³¸íÀÇ ¿ëÀ̼ºÀ» À§Çؼ­ ÀÓÀÇ·Î ºÙÀΠǥ±âÀÔ´Ï´Ù.
  • ÀÌ ¹®¼­¿¡ ±â¼úµÈ Ç¥¿¡¼­ Ưº°ÇÑ ¼³¸íÀÌ ¾øÀ¸¸é 0À¸·Î °£ÁÖÇÏ½Ã¸é µË´Ï´Ù. ÀÌ´Â ¿¹¾à¿µ¿ªÀÇ Àǹ̰¡ ¢¾î¼­ 0ÀÔ´Ï´Ù.
  • ¹æÁØ¿µ´ÔÀÇ ±íÀº Á¶¾ð °¨»çµå¸³´Ï´Ù.

1.2. Segment register

  • Logical ÁÖ¼ÒÀÇ 2°¡Áö ºÎºÐ
    • ÇϳªÀÇ Segment´Â SegmentÀÇ ¹üÀ§¿¡ ÀÖ´Â OffsetÀ» °¡¤Ä¤±Áý´Ï´Ù.
    • Segment´Â 16bitÀÇ Selecter·Î Á¤ÀǵǴ µ¿¾È 32bit Offset¸¦ À¯ÁöÇÕ´Ï´Ù.
  • Segment register´Â 6°³·Î ºÐ·ùµÇ¸ç CS, SS, DS, ES, FS, GS°¡ ÀÖ½À´Ï´Ù. ÀÌ 6°³ÀÇ Register¸¦ »ç¿ëÇÏ¿© ¼­·Î ´Ù¸¥ ¸ñÀûÀ» °¡Áø ¸Þ¸ð¸®¸¦ »ç¿ëÇÕ´Ï´Ù. °¢ Segmentº° ¸ñÀû(100% ¹Ýµå½Ã Áöų ÇÊ¿ä´Â ¾ø½À´Ï´Ù.)
    • CS(CodeSegment): ÇÁ·Î±×·¥ÀÇ Instruction ÇÏÀ§ 2°³ÀÇ bit´Â ÇöÀç ÇÁ·Î±×·¥ÀÇ Á¢±Ù±ÇÇÑÀ» Á¤ÀÇÇϸç 0ºÎÅÍ 3±îÁö 4´Ü°è¸¦ °¡Áý´Ï´Ù. 0ÀÌ Á¦ÀÏ ¸¹Àº Á¢±Ù±ÇÇÑÀ» °¡Áö¸ç 3ÀÌ °¡Àå Á¦ÇÑµÈ Á¢±Ù±ÇÇÑÀ» °¡Áý´Ï´Ù. Linux´Â 0°ú 3¸¸À» Kernel mode/User mode·Î °¢°¢ »ç¿ëÇÕ´Ï´Ù.
    • SS(StackSegment): ÇöÀç ÇÁ·Î±×·¥ÀÇ ½ºÅÃ
    • DS(DataSegment): Data
    • ES(ExtraSegment): ¸ñÀûÁö ¶Ç´Â DSÀÇ º¸Á¶
    • FS, GS: ƯÁ¤ÇÑ À̸§µµ ¾ø°í ¸ñÀûµµ ¾ø´Â ÀÚÀ¯·Î¿î Segment (Âü°í: Intel¿¡¼­´Â À̸¦ Á¤ÇÏÁö ¾Ê¾ÒÁö¸¸ Â÷ÈÄ¿¡ Á¤ÇØÁú¼öµµ ÀÖÀ¸¹Ç·Î ÇÁ·Î±×·¡¸Óµé¿¡°Ô »ç¿ë¿¡ À־ ÀÌÁ¡À» Âü°íÇ϶ó°í Çß½À´Ï´Ù.)

1.3. Segment descriptor

  • °¢°¢ÀÇ Segment´Â 8byteÀÇ Segment descriptor¶ó´Â °Í¿¡ ÀÇÇØ ±â¼úµÇ´Âµ¥ ±â¼úµÇ´Â Á¾·ù·Î´Â GDT(Global Descriptor Table) ¶Ç´Â LDT(Local Descriptor Table)°¡ ÀÖ½À´Ï´Ù.
  • GDT´Â 1°³¸¸À» »ç¿ëÇÏÁö¸¸ LDT´Â °¢ Process¸¶´Ù µû·Î ¼ÒÀ¯ÇÒ¼ö ÀÖ½À´Ï´Ù.
  • Memory»óÀÇ GDT¿Í LDTÀÇ DescriptorÀÇ ÁÖ¼Ò¿Í ÇѰè´Â gdtr°ú ldtrÀ̶ó´Â Register¿¡ ÀÐÇôÁý´Ï´Ù. LDT´Â GDT·ÎºÎÅÍ ¼±ÅÃÀ̵Ǹç GDTÁß ÇÑ °³´Â LDT¸¦ ÁÖ¼ÒÁöÁ¤Çϵµ·Ï µÇ¾î ÀÖ½À´Ï´Ù.

1.3.1. DescriptorÀÇ ±¸Á¶

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Base (32 ~ 24bit) G B(D) O AVL Limit (19 ~ 16bit)
P DPL S E ED/C R/W A Base (23 ~ 16bit)
Base (15 ~ 0bit)
Limit (15 ~ 0bit)
  • Limit : Descriptor°¡ ¼­¼úµÇ´Â ¿µ¿ªÀÇ ÇѰ迡¼­ 1À» »« °ª (Áï, 0Àº ÇѰ谪ÀÌ 1ÀÌ µË´Ï´Ù)
  • P : DescriptorÀÇ Á¤ÀÇ À¯¹« (1)
  • DPL: Descriptor Ư±Ç·¹º§ (0 ~ 3)
  • S : System descriptor(1) ¶Ç´Â Code/Data descriptor(0)
  • E : Code(1) / Data(0)
  • ED : Data(0) / Stack(1) - E°¡ 0ÀÎ °æ¿ì
  • C : Ư±Ç·¹º§ Áؼö(1) / ¹«½Ã(0) - E°¡ 1ÀÎ °æ¿ì
  • R : Code°¡ ÀÐÇôÁú¼ö ÀÖ´Ù(1) / ¾ø´Ù(0) - E°¡ 1ÀÎ °æ¿ì
  • W : Data°¡ ±â·ÏµÉ¼ö ÀÖ´Ù(1) / ¾ø´Ù(0) - E°¡ 0ÀÎ °æ¿ì
  • A : DescriptorÀÇ AccessÀ¯¹« - Micro processor°¡ °ü¸®ÇÔ
  • G : Limit°ªÀÌ 1 ~ 1MByte »çÀ̸¦ °¡Áú °ÍÀΰ¡(0) ¾Æ´Ï¸é 4K~4GByte »çÀ̸¦ °¡Áú°ÍÀΰ¡(1)¸¦ °áÁ¤
  • B(D) : 16bit ÇØ¼®(0) ¶Ç´Â 32bit ÇØ¼®(1)
  • O : ÇöÀç 0À¸·Î ¿¹¾àµÊ
  • AVL : Segment°¡ À¯¿ëÇÑÁöÀÇ ¿©ºÎ - ¿î¿µÃ¼Á¦°¡ °ü¸®(ÀÌ´Â °¡»ó¸Þ¸ð¸®ÀÇ ¿©ºÎ·Î Á¾Á¾ »ç¿ë)
    • Âü°í : À§ÀÇ ±¸Á¶´Â 80x386±â¹ÝÀÇ DescriptorÀ̰í 80x286¿¡¼­´Â Base(32~24)¿Í G/B/O/AVL/Limit(19~16)Ç׸ñÀº 0À¸·Î ¿¹¾àµÇ¾î ÀÖ½À´Ï´Ù.
    • Âü°í : ù ¹øÂ° GDT´Â Ç×»ó 0À¸·Î ¿¹¾àµÇ¾î ÀÖÀ¸¸ç 0ÀÌ ¾Æ´Ñ °ªÀ» °¡Áö°í ÀÖ´õ¶óµµ »ç¿ëÇÒ¼ö ¾ø½À´Ï´Ù. ÀÌ´Â NULLÆ÷ÀÎÅÍ¿¡ ÀÇÇÑ ¿À·ù¸¦ ¸·±â À§ÇÑ °ÍÀÌ°í ¶§¹®¿¡ »ç¿ëµÉ¼ö ¾ø½À´Ï´Ù. ÀÀ¿ëÇÏÀÚ¸é 0¹ø GDT´Â »ç¿ëÇÒ¼ö ¾øÀ¸¹Ç·Î GDT¸¦ gdtr¿¡ ¿Ã¸®±â À§Çؼ­ ÀÌ ¿µ¿ª¿¡ GDTÁ¤º¸ 6¹ÙÀÌÆ®¸¦ ½Æ´Â ÇÁ·Î±×·¥ÀÌ Á¾Á¾ ÀÖÀ¸¸ç ÀÌ´Â 8¹ÙÀÌÆ®¸¦ ¾Æ³¥¼ö ÀÖ´Â ÇϳªÀÇ ÃÖÀûÈ­ ¹æ¾ÈÀÌ µË´Ï´Ù. (°ü¸®µµ ½¬¿öÁü)
    • Âü°í : Descriptor¿¡ Á¤ÀÇµÈ °¢ Ç׸ñº° À̸§Àº ½ÇÁ¦·Î Á¤ÀÇµÈ ´Ü¾îµéÀÌ ¾Æ´Õ´Ï´Ù. Intel¿¡¼­´Â ¶Ñ·ÇÇÏ°Ô À̸¦ ¹àÈùÀû ÀÌ ¾ø½À´Ï´Ù.
    • Âü°í : P, DPL, S, E, ED/C, R/W, A bit¸¦ ÇÊÀÚ´Â Access right bit¶ó°í ĪÇϰí Áß¿äÇÑ ºÎºÐÀ¸·Î °¡Á¤ÇÏ°í º¸¼¼¿ä.

1.3.2. SelectorÀÇ ±¸Á¶

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Selector TI RPL
  • RPL : ¿äûÇÒ Æ¯±Ç·¹º§ (0 ~ 3)
  • TI : GDT(0) / LDT(1) ¼±ÅÃ
  • Selector : GDT ¶Ç´Â LDT(TI¿¡ ÀÇÇØ¼­ ¼±ÅõÈ)ÀÇ 8192(2ÀÇ 13½Â)°³Áß 1°³¸¦ ¼±ÅÃ
    • Âü°í : GDT/LDT °¢°¢ 8192°³¾¿ 16,384°³ÀÇ Descriptor°¡ ¾ðÁ¦µçÁö À̿밡´ÉÇÑ °ªÀÌ µÇ¹Ç·Î ÃÖ´ë ±× ¸¸Å­ÀÇ Segment°¡ °¢ ÀÀ¿ë¿¡ »ç¿ëµÉ¼ö ÀÖ½À´Ï´Ù.
    • ¿¹ : ¸¸¾à 2¹øÂ° Descriptor¸¦ ¼±ÅÃÇÑ´Ù°í °¡Á¤Çϸé (2 << 3)=0010h°¡ µË´Ï´Ù

1.3.3. Segment ÀåÄ¡

  • TI¿¡ ÀÇÇØ¼­ ¼±ÅÃµÈ gdtr ¶Ç´Â ldtrÀ» Àоî GDT ¶Ç´Â LDT¿¡¼­ Descriptor¸¦ ¼±ÅÃÇÏ°í ¼±ÅÃµÈ Descriptor¿¡¼­ Base + Offset register¸¦ ÁÖ¼ÒÁöÁ¤ÇÏ°Ô µÇ¸ç Limit*(G bit MUL)¸¦ ¹ù¾î³­ OffsetÀ» °¡Áú °æ¿ì ¿¹¿Üó¸®(ÈçÈ÷ ¸»ÇÏ´Â Segment fault)°¡ ¼öÇà µË´Ï´Ù.

1.3.4. System descriptorÀÇ Á¾·ù

  • À§¿¡¼­ Access right bit¶ó°í ĪÇÑ ºÎºÐÁß¿¡¼­ E, ED/C, R/W, A¸¦ S bit¿¡ ÀÇÇØ¼­ ¾Æ·¡ÀÇ Ç¥¸¦ Âü°í·Î ÇÏ¿© System descriptor·Î ¼º°ÝÀÌ ¹Ù²î°Ô µË´Ï´Ù.
    Type ¸ñÀû
    0000b ¹«È¿
    0001b ÀÌ¿ë °¡´ÉÇÑ 80x286 TSS
    0010b LDT
    0011b ¹Ù»Û 80x286 TSS
    0100b 80x286 call gate
    0101b Task gate
    0110b 80x286 Interrupt gate
    0111b 80x286 Trap gate
    1000b ¹«È¿
    1001b ÀÌ¿ë °¡´ÉÇÑ 80x386 TSS
    1010b ¹Ì·¡ÀÇ Intel Á¦Ç°À» À§ÇÑ reserved
    1011b ¹Ù»Û 80x386 TSS
    1100b 80x386 call gate
    1101b ¹Ì·¡ÀÇ Intel Á¦Ç°À» À§ÇÑ reserved
    1110b 80x386 Interrupt gate
    1111b 80x386 Trap gate

1.3.5. Gate descriptor

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Base (32 ~ 24bit) G B(D) O AVL Limit (19 ~ 16bit)
P DPL 0 Type 0 0 0 Work count (4 ~ 0 bit)
Selector
Offset (15 ~ 0 bit)
  • Word counter´Â È£ÃâÀÚÀÇ Stack À¸·ÎºÎÅÍ È£ÃâµÈ Gate¿¡ ÀÇÇØ Á¢±ÙµÈ ProcedureÀÇ StackÀ¸·Î ¸î°³ÀÇ Word°¡ Àü¼ÛµÉ °ÍÀÎÁö¸¦ ³ªÅ¸³À´Ï´Ù.
    • °£´ÜÈ÷ ¼³¸íÇÏÀÚ¸é ÀÎÀÚÀÇ °³¼ö¸¦ ¸î°³·Î ¹ÞÀ»Áö¸¦ ¿¹±âÇÏ´Â °Ì´Ï´Ù. ¹°·Ð ´Ù¸¥ ¸ñÀûµµ ÀÖÁö¸¸ ±³°ú¼­ÀûÀÎ ³»¿ëÀ¸·Î ºÃÀ»¶§´Â ...
  • Word °³¼ö Ç׸ñÀº Interrupt gate¿Í ÇÔ²² »ç¿ëµÇÁö ¾Ê´Â´Ù´Âµ¥ À¯ÀÇÇÒ Çʿ䰡 ÀÖ°Ú½À´Ï´Ù. (Áï, ÀÌ °æ¿ì Word count=0)
  • Gate°¡ Á¢±ÙµÉ¶§ SelectorÀÇ ³»¿ëÀÌ TR(Task register)¿¡ žÀçµÈ´Ù´Â °Íµµ ÀÎÁöÇϰí ÀÖ¾î¾ß ÇÕ´Ï´Ù.

1.3.6. General protectionÀ§¹ÝÀÇ Á¾·ù

À̰ÍÀº Interrupt 0x0d¿Í ¹ÐÁ¢ÇÑ °ü·ÃÀÌ ÀÖ½À´Ï´Ù.
  • Descriptor tableÀÇ ¹üÀ§ Ãʰú
  • Ư±Ç±ÔÄ¢ À§¹Ý
  • À߸øµÈ Descriptor segment typeÀÇ Å¾Àç
  • º¸È£µÈ Code segment¿¡ Write½Ãµµ
  • ÀбâÀü¿ë Code segmentÀÇ Àбâ (À̰ÍÀº ±×·²¼öµµ ¾Æ´Ò¼öµµ ÀÖ´Ù´Â Á¡À» ÀÎÁöÇϰí ÀÖ¾î¾ß ÇÕ´Ï´Ù.)
  • ÀбâÀü¿ë Data segment¿¡ Write½Ãµµ
  • SegmentÀÇ ¹üÀ§ Ãʰú
  • CTS, HLT, LGDT, LIDT, LLDT, LMSW, LTRÀ» ½ÇÇà½Ã¿¡ Á¶°Ç (CPL == IOPL)À» °Ë»çÇÏ¿© À§¹ÝµÉ °æ¿ì
  • CLI, IN, INS, LOCK, OUT, OUTS, STI¸¦ ½ÇÇà½Ã¿¡ Á¶°Ç (CPL > IOPL)À» °Ë»çÇÏ¿© À§¹ÝµÉ °æ¿ì

1.4. Paging

  • Á¤ÀÇ : PasingÀº ÀÓÀÇÀÇ ¼±Çü(³í¸®)ÁÖ¼Ò°¡ ÀÓÀÇÀÇ ¹°¸®Àû ¸Þ¸ð¸® Page¿¡ ³õÀϼö ÀÖ°Ô ÇØÁÖ´Â ¹æ¹ý
  • Linear memory page´Â ¸®¾ó¸ðµå ¹× º¸È£¸ðµå¿¡¼­ »ç¿ëÇÒ¼ö ÀÖ½À´Ï´Ù. Áï, º¸È£¸ðµå Àü¿ëÀÌ ¾Æ´Õ´Ï´Ù.
  • x86ÀÇ Memory page Çϳª´Â ±æÀ̰¡ 4K¹ÙÀÌÆ® ¼±»ó´ÜÀ§·Î À̸¦ ±¸ÇöÇϴµ¥´Â 3°¡Áö ¿ä¼Ò°¡ »ç¿ëµË´Ï´Ù.
    31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
    Directory (10 bit) Table (10 bit) Offset (12 bit)
  • Page mode·Î µé¾î°¡±â À§Çؼ­´Â CR0 Register¿¡ ÀÖ´Â PG bit¸¦ 1·Î ÇÕ´Ï´Ù. ±× Àü¿¡ directory/tableÀº Áغñ µÇ¾î ÀÖ¾î¾ß ÇÕ´Ï´Ù.
  • CR3 Register
    31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
    Page directory base OS bit 0 0 D A PCD PWT U/S W P
  • P : ³í¸® 1À̸é ÁÖ¼Òº¯È¯¿¡¼­ »ç¿ë °¡´ÉÇϰí 0ÀÌ¸é º¯È¯¿¡ »ç¿ëµÉ¼ö ¾ø½À´Ï´Ù. Áï, 0À̸é Disk pagingÀÌ ±¸Çö°¡´ÉÇÕ´Ï´Ù. µû¶ó¼­ °¢ PageTable¿¡ MappingµÇ´Â ÁÖ¼ÒÀÇ Å©±â´Â 4MByte°¡ µË´Ï´Ù.(ÃÑ Mapping °¡´ÉÇÑ ÁÖ¼Ò°ø°£Àº 4G, È®ÀåµÈ PagingÀ» »ç¿ëÇÒ °æ¿ì 4M´ÜÀ§ÀÇ PageÅ©±â·Î ÃÑ Mapping °¡´ÉÇÑ ÁÖ¼Ò°ø°£Àº 64G)
  • R/W, U/S : °¢°¢ÀÇ bitÁ¶ÇÕ¿¡ µû¶ó °¡Àå ³·Àº À¯Àú 3À» À§ÇÑ ¿ì¼±¼øÀ§ ·¹º§ º¸È£¸¦ Á¦°øÇÕ´Ï´Ù.
    0 0 ¾øÀ½
    1 0 ¾øÀ½
    0 1 Àбâ Àü¿ë
    1 1 Àбâ / ¾²±â
  • PWT : Write-through Cache
  • PCD : Cache disable
  • A(Accessed) : Microprocessor°¡ µð·ºÅ丮 Ç׸ñÀ» Á¢±ÙÇÒ¶§¸¶´Ù 1·Î ¼¼Æ®µË´Ï´Ù.
  • D : Dirty·Î ¿î¿µÃ¼Á¦¸¦ À§ÇØ »ç¿ëµË´Ï´Ù.
    • ¿¹Á¦ Source
      PageDirectory DD 4 ; ÆäÀÌÁö µð·ºÅ丮 PageTable0 DD 1024 DUP (?) ; ÆäÀÌÁö Å×À̺í 0¹ø XOR EAX, EAX MOV AX, CS SHL EAX, 4 ADD EAX, OFFSET PageTable0 ; ¿©±â±îÁö ³í¸®Àû ¸Þ¸ð¸® ÁÖ¼Ò¸¦ ¼±Çü ¸Þ¸ð¸® ÁÖ¼Ò·Î º¯È¯ÇÑ °Í AND EAX, 0fffff000h OR AL, 7 MOV PageDirectory, EAX ; PageDirectory´Â PageTable0 ... MOV CX, 256 ; 4K * 256¸¸Å­À» Àç ¸ÊÇÎ Çϱâ À§ÇÑ Count MOV DI, OFFSET PageTable0 MOV AX, DS MOV ES, AX MOV EAX, 7 ; U/S, R/W, P¸¦ Set L_0: STOSD ADD EAX, 4096 ; Re map 00000h ~ 09ffffh to 00000h ~ 09ffffh LOOP L_0 ; 4K´ÜÀ§·Î Mapping MOV EAx, 0102007h MOV CX, 16 L_1: STOSD ; Re map 0a000h ~ 0affffh to 102000h ~ 11ffffh ADD EAX, 4096 LOOP L_1 ; ¿­½ÉÈ÷ ¿Å±âÁö¸¸ Àç¸ÊÇÎ ½ÃŰ¸é¼­ XOR EAX, EAX MOV AX, DS SHL EAX, 4 ADD EAX, OFFSET PageDirectory MOV CR3, EAX ; In paging... ÆäÀÌ¡ Áغñ ³¡


1.5. È®ÀåµÈ Paging

  • Pentium¿¡¼­´Â º¸´Ù È®ÀåµÈ PagingÀÌ Á¦°øµÇ¸ç Page frameÀÇ Å©±â°¡ 4K¿¡¼­ 4M·Î È®Àå°¡´ÉÇϹǷΠº¸´Ù Å« ¸Þ¸ð¸®ºí·°À» ÀûÀº¼öÀÇ ÆäÀÌÁö µð·ºÅ丮·Î °ü¸®ÇÒ¼ö ÀÖ°Ô µË´Ï´Ù. ´Ü, À̰ÍÀÌ Ç×»ó ÀåÁ¡À¸·Î ³²À»¼ö´Â ¾ø½À´Ï´Ù. Á¶±×¸¶ÇÑ ¸Þ¸ð¸®¸¸À» PagingÇϱ⠿øÇÑ´Ù¸é À̰ÍÀº ¸Þ¸ð¸® È¿À²À» ¶³¾î¶ß¸®´Â °á°ú¸¦ ÃÊ·¡ÇÒ¼ö ÀÖ°Ú½À´Ï´Ù. º¸Åë 32bit ¸Ó½Å¿¡¼­´Â 4MÀÇ Çʿ伺ÀÌ Å« È¿À²À» °¡Á®´Ù ÁÖÁö´Â ¸øÇÒ°ÍÀÔ´Ï´Ù. (ÇÊÀÚ´Â °³ÀÎÀûÀ¸·Î ¼ÒÇÁÆ®¿þ¾î°¡ 2GÀÌ»óÀÇ ¸Þ¸ð¸®¸¦ ¿ä±¸ÇÏ´Â °æ¿ì 4M page¸¦ Á¾Á¾ »ç¿ëÇϴµ¥ pageÀÇ °ü¸®Â÷¿øÀÇ Mapping ÀýÂ÷¿¡ ´ëÇÑ ´Ü¼øÇÔÀ¸·Î Å« ¸Þ¸ð¸® ºí·°À» ÀÚÁÖ »ç¿ëÇÏ´Â taskÀÇ °æ¿ì´Â À̸¦ Á¾Á¾ »ç¿ëÇÏ¿´½À´Ï´Ù. ¾îÂîµÇ¾ú°Ç À̰ÍÀº Á¦ ÄÚµå»ó¿¡¼­´Â ¼º´É Çâ»óÀ» º¸ÀΰÍÀ¸·Î º¸¾Æ¼­ °Å´ëÇÑ ¸Þ¸ð¸® Management Ư¼ºÀ» °¡Áø ¼ÒÇÁÆ®¿þ¾î¿¡¼­´Â °£È¤ ½áº¼¸¸ ÇÑ°Í °°½À´Ï´Ù.)
  • CR4 registerÀÇ bit4¹ø(Page size enable)À» SetÇϸé 4M Page¸ðµå·Î È®ÀåµË´Ï´Ù.
  • 4M mode·Î µé¾î°¡¸é ´ÙÀ½°ú °°ÀÌ ¼±ÇüÁÖ¼Ò°¡ ¹Ù²ò´Ï´Ù. (Page tableÀÌ ¾ø´Ù´Â Á¡¿¡ ÁÖÀÇ)
    31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
    Directory (10 bit) Offset (22 bit)


1.6. Three-level paging

  • RAMÀÌ ½Î°Ô °ø±ÞµÇ¾î ¿ë·®ÀÌ Ä¿Áö´õ¶óµµ Page tableÀ» Memory°ø°£¿¡ ³¶ºñ¸¦ ÇÏ´Â °ÍÀº ¹Ù¶÷Á÷ÇÏÁö ¾ÊÀ¸¹Ç·Î 64bit¿¡¼­´Â Three-level pasingÀ» »ç¿ëÇØ¾ß ÇÒ°ÍÀÔ´Ï´Ù. Alpha¿Í UltraSPARCÀº 64bit°è¿­À̸ç ÀÌ´Â Three-level pagingÀ» ¿©±â¿¡ Àû¿ëÇÒ ¼ö ÀÖ½À´Ï´Ù. PageÅ©±â°¡ ¹«Á¶°Ç Å©°Ô ÇÑ´Ù°í ÁÁÀº°Ô ¾Æ´Ï¹Ç·Î 16K Page°¡ Àû´çÇÕ´Ï´Ù. 16K´Â 14bit·Î ÁÖ¼ÒÁöÁ¤ÀÌ °¡´ÉÇϹǷΠoffset Ç׸ñÀº 14bit·Î ÇÏ°í ³ª¸ÓÁö 50bitÁß 25bit¾¿ °¢°¢ Directory¿Í Table·Î »ç¿ëÇÑ´Ù¸é 3200¸¸°³ÀÇ Page°¡ °¡´ÉÇÕ´Ï´Ù.
    • Alpha microprocessor¿¡¼­´Â ´ÙÀ½°ú °°½À´Ï´Ù.
      Page´Â 8K·Î ÇÏ¿© 13bitÀ̰í PageTableÀº 10ºñÆ®¾¿ 3°³·Î Âɰ³¾î Two-level¿¡¼­´Â 10bit=1024¸¸Å­ÀÇ PageTableÀ» °¡Áú¼ö ÀÖ°Ô ÇÕ´Ï´Ù. ³ª¸ÓÁö 21bit´Â Ç×»ó 0ÀÔ´Ï´Ù.
    • Global directory(10bit) Middle directory(10bit) Table(10bit) Offset(13bit)
      25bit 25bit 14bit

1.7. Hardware cache

  • PCD : MicroprocessorÀÇ PCDÇÉÀÇ ±â´ÉÀ» Á¦¾îÇϸç ÀÌ °ÍÀÌ setµÇ¸é Page°¡ ¾Æ´Ñ Bus»çÀÌŬµ¿¾È ³í¸® 1ÀÌ µË´Ï´Ù. À̰ÍÀº ¿ÜºÎ Çϵå¿þ¾î°¡ Level-II cache memory¸¦ Á¦¾îÇÒ¼ö ÀÖ°Ô ÇÕ´Ï´Ù. (°£´ÜÈ÷ ¸»Çؼ­ CacheÇÒ°ÇÁö ¾ÈÇÒ°ÇÁö)
  • PWT : MicroprocessorÀÇ PWTÇÉÀÇ ±â´ÉÀ» Á¦¾îÇϸç Write-through cache¸¦ Á¦¾îÇϱâ À§Çؼ­Page°¡ ¾Æ´Ñ Bus»çÀÌŬµ¿¾È PWTÇÉ¿¡ ³ªÅ¸³³´Ï´Ù.
    • ÀÌ ºñÆ®´Â ½ÅÁßÈ÷ °áÁ¤ÇØ¾ß ÇÑ´Ù°í ÇÊÀÚ´Â °­·ÂÈ÷ ÁÖÀåÇÕ´Ï´Ù. Àß ¼±ÅÃÇÏ¸é ¼º´ÉÀ» ±Ø´ëÈ­ ÇÕ´Ï´Ù.

1.7.1. Translation Lookaside Buffers (TLB)

  • x86°è¿­ÀÇ CPU¿¡¼­´Â PagingÀ» À§Çؼ­ ¸Å¹ø Page directory¸¦ Àд°ÍÀº ÁÙÀ̰íÀÚ TLB¶ó´Â ÀÏÁ¾ÀÇ Directory cache buffer¸¦ »ç¿ëÇÕ´Ï´Ù. PentiumºÎÅÍ 4MByte pagingÀ» Áö¿øÇϵµ·Ï µÇ¾úÀ¸¸ç À̰ÍÀÌ 4K page¿Í Â÷ÀÌÁ¡Àº 4M page´Â Page tableÀÌ Á¸ÀçÇÏÁö ¾Ê´Â°ÍÀÌ Æ¯Â¡À̸ç Page directory Å©±â¸¦ ÁÙÀϼö ÀÖ°í Å« ºí·°À» ´Ù·ç¹Ç·Î ¼ÓµµÀûÀÎ ¸é¿¡¼­ ¾à°£ÀÇ ¿ìÀ§¸¦ °®½À´Ï´Ù. ´Ù¸¸, ¸Þ¸ð¸® È¿À²ÀûÀÎ Ãø¸éÀº À߸øÇϸé ÃÖ¾ÇÀÇ ¸Þ¸ð¸® »ç¿ëÀ²ÀÌ ¹ß»ýÇÒ¼ö ÀÖÀ¸¹Ç·Î ÀÌÁ¡Àº ¹Ýµå½Ã °í·ÁµÇ¾î¾ß ÇÕ´Ï´Ù.
  • Ư±Ç·¹º§ÀÌ ³ôÀº ¿î¿µÃ¼Á¦(·¹º§ 0)µî¿¡¼­ ÀÌ Page directory¸¦ È¿À²ÀûÀ¸·Î °ü¸®Çϱâ À§ÇØ ÀÚÁÖ ¹Ù²Ù°Ô µÇ´Âµ¥ ¹®Á¦´Â Ư±Ç·¹º§ÀÌ ³·Àº ÀÀ¿ëÇÁ·Î±×·¥¿¡¼­´Â À̸¦ ¹Ù²î¾ú´ÂÁö ¾Ë Çʿ䵵 ¾ø°í TLB¿¡ ´ëÇÑ Á¦¾îµµ ÇÒ¼ö ¾øÀ¸¹Ç·Î ¸Å¹ø ¿î¿µÃ¼Á¦°¡ ±×°ÍÀ» ºñ¿öÁְųª ¹Ù²ïºÎºÐ¸¸À» TLB·ÎºÎÅÍ °»½ÅÇØÁÖ¾î¾ß ÇÏ´Â ¹®Á¦°¡ ÀÖ½À´Ï´Ù. ´ÙÇàÀ̵µ À̰ÍÀÌ ¿ì¿¬ÀÎÁö ¾Æ´ÑÁö º°·Î ±×·¸°Ô Å« ½Å°æÀ» ¾µ Çʿ䰡 ¾ø´Ù´Âµ¥ ´ÙÇàÀÏ»ÓÀÌÁö¸¸ ¾î·°Ç ¿Ö ´ÙÇàÀÎÁö´Â ¾Ë¾Æ¾ß °ÚÁÒ?
    PUSHF ; ¿©±â¼­´Â PUSHF, CLI, POPF´Â °³³äÀûÀÎ ÀÌÇØ¸¦ À§ÇØ ¾´°Ì´Ï´Ù. CLI MOV EAX, CR3 MOV CR3, EAX POPF
    Áï, ±×³É CR3 register¸¦ ÀÐ°í ´Ù½Ã ½áÁÖ¸é TLB°¡ ÀÚ¿¬½º·´°Ô Á¤¸®ÀÛ¾÷ÀÌ µË´Ï´Ù. À̰ÍÀÌ ¿Ö ÀÚ¿¬½º·´°Ô µÇ´Â°¡? ±×°ÍÀº Task¸¦ ÀüȯÇÒ¶§ ÀÌ¹Ì À̰ÍÀÌ ÀÛ¿ëÇϱ⠶§¹®ÀÔ´Ï´Ù. ±× ´ÙÀ½Àº Scheduler¸¦ ÀÌÇØÇÏ¸é µÇ´Âµ¥ ÀÌ ¹®¼­´Â ¹üÀ§¸¦ ¿©±â±îÁö¸¸ ¼Ò°³Çϵµ·Ï ÇϰڽÀ´Ï´Ù.
  • Âü°í·Î ÀÓÀÇÀÇ TLB ƯÁ¤ ºÎºÐÀ» °»½ÅÇÒ¼ö ÀÖ´Â ¸í·ÉÀÌ Àִµ¥ Àؾî¸Ô¾ú½À´Ï´Ù. ³ªÁß¿¡ »ý°¢³ª¸é ¾²µµ·Ï ÇϰڽÀ´Ï´Ù.

1.8. GDT/IDT Setup -> º¸È£¸ðµå ÁøÀÔ ¹× ¸®¾ó¸ðµå µ¹¾Æ¿À±â ¿¹Á¦

; Copyright (c) MINZ ; Code by JaeHyuk Cho - <mailto:minzkn@infoeq.com> DEF_ASM_GO32 EQU "GO32.ASM" DEF_MAX_DefaultGDT = 2000h ; 8192d DEF_MAX_DefaultIDT = 0100h ; 256d PUBLIC RegisterIDT, RegisterGDT PUBLIC SetupIDT, SetupGDT PUBLIC Go32 PUBLIC L_Exit32 ; PUBLIC D_StackFrame PUBLIC D_IDTR, D_GDTR PUBLIC D_IDT_Item, D_GDT_Item PUBLIC D_IDT, D_GDT ASSUME CS:CODE_GO32, DS:DATA_GO32, ES:NOTHING, SS:STACK_DEFAULT CODE_GO32 SEGMENT
  • ¿©±â±îÁö´Â ±×³É ÀϹÝÀûÀÎ ¾î¼Àºí¸®ÀÇ ¾Õ ¸Ó¸®ÀÔ´Ï´Ù.
RegisterIDT PROC FAR ; void far pascal RegisterIDT(unsigned int s_intnum) ; IDT Ãß°¡ »ý¼º PUSH BP MOV BP, SP PUSH EAX PUSH EDX XOR EAX, EAX MOV AX, WORD PTR [BP + 06h] ; s_intnum MOV DX, DEF_SIZE_Descriptor MUL DX ADD EAX, OFFSET DESC_GO32_IDT:D_IDT PUSH DESC_GO32_IDT PUSH AX PUSH DATA_GO32 PUSH OFFSET DATA_GO32:D_IDT_Item PUSH DEF_SIZE_Descriptor CALL FAR PTR CODE_MEMORY:MemCpy POP EDX POP EAX POP BP RETF 2 RegisterIDT ENDP
  • IDT¸¦ ±¸Á¶¿¡ ¸Â°Ô ÀÎÀÚ·Î ¹Þ¾Æ¼­ ¸¸µé¾î ÁÝ´Ï´Ù.
RegisterGDT PROC FAR ; void far pascal RegisterGDT(unsigned int s_descnum) PUSH BP MOV BP, SP PUSH EAX PUSH EDX XOR EAX, EAX MOV AX, WORD PTR [BP + 06h] ; s_descnum MOV DX, DEF_SIZE_Descriptor MUL DX ADD EAX, OFFSET DESC_GO32_GDT:D_GDT PUSH DESC_GO32_GDT PUSH AX PUSH DATA_GO32 PUSH OFFSET DATA_GO32:D_GDT_Item PUSH DEF_SIZE_Descriptor CALL FAR PTR CODE_MEMORY:MemCpy POP EDX POP EAX POP BP RETF 2 RegisterGDT ENDP
  • GDT¸¦ ±¸Á¶¿¡ ¸Â°Ô ÀÎÀÚ·Î ¹Þ¾Æ¼­ ¸¸µé¾î ÁÝ´Ï´Ù.
SetupIDT PROC FAR ; void far pascal SetupIDT(void) PUSH DS PUSH AX MOV AX, DATA_GO32 MOV DS, AX POP AX POP DS RETF SetupIDT ENDP
  • IDT¸¦ ¸¸µå´Â ºÎºÐÀÌÁö¸¸ ±×³É ºñ¾î ÀÖ½À´Ï´Ù. SetupGDTÇÔ¼öó·³ RegisterIDT¸¦ »ç¿ëÇÏ¿© ¾È¿¡ ä¿ö³ÖÀ¸¸é µË´Ï´Ù.
SetupGDT PROC FAR ; void far pascal SetupGDT(void) PUSH DS PUSH AX PUSH BX MOV AX, DATA_GO32 MOV DS, AX ; 0000h - Null descriptor XOR AX, AX MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_LimitLow, AX MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_BaseLow, AX MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseMid, AL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access00, AL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access01, AL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseHigh, AL PUSH AX CALL FAR PTR CODE_GO32:RegisterGDT ; 0001h - IDT descriptor ; 0002h - GDT descriptor ; 0003h - Real code descriptor PUSH CODE_GO32 PUSH DEF_Null CALL FAR PTR CODE_CALC:ToPhysical MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_LimitLow, 0FFFFh MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_BaseLow, AX MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseMid, DL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access00, 10011010b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access01, 00000000b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseHigh, DH PUSH 0003h CALL FAR PTR CODE_GO32:RegisterGDT ; 0004h - Real data descriptor PUSH DATA_GO32 PUSH DEF_Null CALL FAR PTR CODE_CALC:ToPhysical MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_LimitLow, 0FFFFh MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_BaseLow, AX MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseMid, DL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access00, 10010010b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access01, 00000000b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseHigh, DH PUSH 0004h CALL FAR PTR CODE_GO32:RegisterGDT ; 0005h - Full data descriptor MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_LimitLow, 0FFFFh MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_BaseLow, 00000h MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseMid, 000h MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access00, 10010010b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access01, 11001111b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseHigh, 000h PUSH 0005h CALL FAR PTR CODE_GO32:RegisterGDT ; 0006h - Video data(TEXT) descriptor ; 0007h - Video data(GRAPHICS) descriptor ; 0008h - Code descriptor PUSH CODE_KN32 PUSH OFFSET CODE_KN32:KernelMain32 CALL FAR PTR CODE_CALC:ToPhysical MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_LimitLow, 0FFFFh MOV WORD PTR DATA_GO32:D_GDT_Item.STRUC_BaseLow, AX MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseMid, DL MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access00, 10011110b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_Access01, 11000000b MOV BYTE PTR DATA_GO32:D_GDT_Item.STRUC_BaseHigh, DH PUSH 0008h CALL FAR PTR CODE_GO32:RegisterGDT ; 0009h - Data descriptor ; 000Ah - Bss descriptor ; 000Bh - Stack descriptor ; 000Ch - Heap descriptor ; Load GDT MOV EAX, OFFSET DESC_GO32_GDT:D_GDT PUSH DESC_GO32_GDT PUSH AX CALL FAR PTR CODE_CALC:ToPhysical MOV WORD PTR DATA_GO32:D_GDTR.STRUC_LimitLow, (DEF_MAX_DefaultGDT * DEF_SIZE_Descriptor) - 1 MOV WORD PTR DATA_GO32:D_GDTR.STRUC_BaseLow, AX MOV BYTE PTR DATA_GO32:D_GDTR.STRUC_BaseMid, DL MOV BYTE PTR DATA_GO32:D_GDTR.STRUC_Access00, DH LGDT QWORD PTR DATA_GO32:D_GDTR POP BX POP AX POP DS RETF SetupGDT ENDP
  • »ç¿ëÇÒ Descriptor¸¦ ¼º°Ý¿¡ ¸Â°Ô µî·ÏÇÕ´Ï´Ù.
Go32 PROC FAR ; void far pascal Go32(void) PUSH DS PUSH ES PUSH FS PUSH GS PUSHAD ; Print PUSH DATA_GO32 PUSH OFFSET DATA_GO32:S_MSG_Go32_Enter CALL FAR PTR CODE_TEXT:Puts ; Clear descriptor PUSH DESC_GO32_IDT MOV EAX, OFFSET DESC_GO32_IDT:D_IDT ; 32bit offset PUSH AX PUSH DEF_Null PUSH (DEF_MAX_DefaultIDT * DEF_SIZE_Descriptor) SHR 01h CALL FAR PTR CODE_MEMORY:MemSetW PUSH DESC_GO32_GDT MOV EAX, OFFSET DESC_GO32_GDT:D_GDT ; 32bit offset PUSH AX PUSH DEF_Null PUSH (DEF_MAX_DefaultGDT * DEF_SIZE_Descriptor) SHR 01h CALL FAR PTR CODE_MEMORY:MemSetW ; Setup descriptor & environ CALL FAR PTR CODE_GO32:SetupIDT CALL FAR PTR CODE_GO32:SetupGDT ; Set PE MOV AX, DATA_GO32 MOV DS, AX MOV AX, SS MOV WORD PTR DATA_GO32:D_StackFrame[DEF_Far_Segment], AX MOV WORD PTR DATA_GO32:D_StackFrame[DEF_Far_Offset], SP MOV EAX, CR0 OR AL, 01h MOV CR0, EAX ; º¸È£¸ðµå ÁøÀÔÁ¡ MAC_ClearCache ; Code cache¸¦ Áö¿ì±â À§ÇØ ±×³É ¹Ù·Î ¾Õ¿¡ Á¡ÇÁ "jmp $+2" MAC_JumpFar <0003h * DEF_SIZE_Descriptor>, <OFFSET CODE_GO32:L_GO32_Enter> ; DWORD jump ÀÔ´Ï´Ù. L_GO32_Enter LABEL FAR MOV AX, 0004h * DEF_SIZE_Descriptor MOV DS, AX MOV ES, AX MOV FS, AX MOV GS, AX ; MOV AX, 000Bh * DEF_SIZE_Descriptor ; MOV SS, AX ; XOR ESP, ESP XOR EAX, EAX XOR EBX, EBX XOR ECX, ECX XOR EDX, EDX XOR ESI, ESI XOR EDI, EDI XOR EBP, EBP MAC_JumpFar <0008h * DEF_SIZE_Descriptor>, <OFFSET CODE_KN32:KernelMain32> ; ½ÇÁ¦ 32ºñÆ® µ¿ÀÛÀ» ÇÒ 32ºñÆ® Äڵ尡 ÀÖ´Â °÷ ; Clear PE L_Exit32 LABEL FAR MOV EAX, CR0 AND AL, 0FEh MOV CR0, EAX MAC_ClearCache MAC_JumpFar <CODE_GO32>, <OFFSET CODE_GO32:L_GO32_Return> ; Real mode·Î µ¹¾Æ¿É´Ï´Ù. ÇÏÁö¸¸ ¾ÆÁ÷Àº Real modeÀÇ ¿ÏÀüÇÑ ¹ÝȯÀº ¾Æ´Õ´Ï´Ù. L_GO32_Return LABEL FAR ; Restore environ MOV AX, DATA_GO32 ; ¿©±â¼­ ½ÇÁ¦·Î Real mode¸¦ À§ÇÑ Segment¸¦ ¹èÄ¡ÇÏ¿© ÁÝ´Ï´Ù. MOV DS, AX XOR AX, AX MOV ES, AX MOV FS, AX MOV GS, AX LSS SP, DWORD PTR DATA_GO32:D_StackFrame ; Print PUSH DATA_GO32 PUSH OFFSET DATA_GO32:S_MSG_Go32_Return CALL FAR PTR CODE_TEXT:Puts POPAD POP GS POP FS POP ES POP DS RETF Go32 ENDP
  • º¸È£¸ðµå·Î ÁøÀÔÇß´Ù°¡ ±×³É ³ª¿É´Ï´Ù.
CODE_GO32 ENDS ASSUME CS:CODE_GO32, DS:DATA_GO32, ES:NOTHING, SS:STACK_DEFAULT DATA_GO32 SEGMENT S_MSG_Go32_Enter DB 0FEh, " Enter to 32bit processing." DB DEF_ASCII_CarrigeReturn, DEF_ASCII_LineFeed DB DEF_ASCII_EndOfString S_MSG_Go32_Return DB 0FEh, " Return to 16bit processing." DB DEF_ASCII_CarrigeReturn, DEF_ASCII_LineFeed DB DEF_ASCII_EndOfString D_StackFrame DW DEF_Null, STACK_DEFAULT D_IDTR STRUC_Descriptor <0000h, 0000h, 00h, 00h, 00h, 00h> D_GDTR STRUC_Descriptor <0000h, 0000h, 00h, 00h, 00h, 00h> D_IDT_Item STRUC_Descriptor <0000h, 0000h, 00h, 00h, 00h, 00h> D_GDT_Item STRUC_Descriptor <0000h, 0000h, 00h, 00h, 00h, 00h> DATA_GO32 ENDS ASSUME CS:CODE_GO32, DS:BSS_GO32, ES:NOTHING, SS:STACK_DEFAULT BSS_GO32 SEGMENT BSS_GO32 ENDS ASSUME CS:CODE_GO32, DS:DESC_GO32_IDT, ES:NOTHING, SS:STACK_DEFAULT DESC_GO32_IDT SEGMENT D_IDT STRUC_Descriptor DEF_MAX_DefaultIDT DUP (<>) DESC_GO32_IDT ENDS ASSUME CS:CODE_GO32, DS:DESC_GO32_GDT, ES:NOTHING, SS:STACK_DEFAULT DESC_GO32_GDT SEGMENT D_GDT STRUC_Descriptor DEF_MAX_DefaultGDT DUP (<>) DESC_GO32_GDT ENDS END ; End of source
  • º¸½Ã´Â ¹Ù¿Í °°ÀÌ ÇÊ¿äÇÑ Data segment¸¦ ±â¼úÇÏ¿´½À´Ï´Ù.

1.9. ¹®¼­¸¦ ¸¶Ä¡¸é¼­

  • ÀÌ ¹®¼­¿¡¼­ Ʋ¸° ºÎºÐÀ̳ª °íÃÄ¾ß ÇҺκÐÀÌ ÀÖÀ¸¸é ²À ¾Ë·ÁÁֽʽÿä.
  • ÀÌ ¹®¼­´Â ÀÛ¼ºÇÑ ½ÃÁ¡(2001³â ¾î´À³¯)À» ±âÁØÀ¸·Î ÀÛ¼ºÇÏ¿´°í ÇÊÀÚ ³ª¸§´ë·ÎÀÇ ±â¾ï¿¡¼­ ³ª¿Â°ÍÀ¸·Î ÇöÀ縦 ±âÁØÀ¸·Î º¸¸é ±× ³»¿ëÀÌ À߸øµÇ¾úÀ»¼ö ÀÖ½À´Ï´Ù.
  • º» ¹®¼­ÀÇ °¡Àå ÃÖ±Ù ¹®¼­¸¦ º¸½Ã·Á¸é http://minzkn.pe.ky¸¦ ÅëÇØ¼­ Wiki·Î Á¢¼ÓÇÏ½Ã¸é º¸½Ç¼ö ÀÖ½À´Ï´Ù.

1.10. ÀúÀÛ±Ç

  • º» ¹®¼­´Â [http]GFDLÀÇ ¶óÀ̼¾½º¸¦ ±â¹ÝÀ¸·Î ÀÛ¼ºµÇ¾ú°í À¯ÁöµË´Ï´Ù.


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